1. abstract ldmos technology recently implemented at st is an important step forwards, combining technological and environmental progress. in the basic ldmos structure (figure 1), a p-epitaxial layer is grown on an p-type substrate to form a larger drain region. an important consequence of this structure is that both the n+ source and the drain region are on the die surface, with the laterally diffused low resistance p+ sinker connecting the source region to the p+ substrate and source terminal. wire-bonded connections which normally connect the source and the external circuitry (dmos configuration) are no longer required thus greatly reducing the negative feedback due to wires self-capacitance and inductance. this leads to higher gain at high frequencies. a further advantage of this structure is that an electrical insulator required to isolate the drain with dmos transistors is no longer needed. hence not only electrical and thermal performances of the package are improved, but it also eliminates beryllium oxide, a toxic compound, from the package. ldmos package development offers higher dissipated power, cost reduction and lower environmental impact. 2. ldmos package structure. figure 1: ldmos cross section in such a structure there is no need to electrically isolate the die from the flange as for bipolar die, by using a beryllium oxide (beo) interface (figure 1 and 2). ldmos package development eliminates any substances which could affect and/or deteriorate the environment. therefore, because beo is toxic it is no longer used. moreover, the ldmos die is soldered directly to the flange (for example, the tungsten-copper alloy flange).this results in better electrical and thermal performances. july 2000 1/4 AN1233 application note ldmos packages serge juhel
AN1233 - application note 2/4 m243 flange so-8 ceramic m250 flangeless source die drain bond wire gate bond wire lead ceramic lid epoxy glue al or aln substrate flange (e.g. w-cu) figure 2: ldmos package structure 3. mounting techniques and characteristics. surface mount packages were developed to reduce assembly cost and space allocation on printed circuit board (pcb). today, st microelectronics offers three types of packages for its l-dmos product: flange, flangeless and smd (figure 3). indeed all three package types have their own mounting techniques and characteristics: figure 3: package styles 3.1 flange package (e.g. m243 package). heatsink flatness on the mounting area must be better than 0.02 mm. the mounting area roughness must be less than 0.5 m m. flux solution is not needed. because the package is non hermetically sealed, damage could occure. the pcb must be thouroughly washed clear of flux solution before mounting the rf transistor. then a thin layer of thermal paste must be applied to the flange; however, an excessive thickness of thermal paste will increase the thermal resistance and one must stay cautious. screws with a flat washer must be used in order to spread the pressure evenly on the joints. each screw must be slightly tightened (finger tight: 0.05 nm) and then the screws must be tightened to the specified torque. a typical torque value for m243 package is 0.65 nm. reflow soldering is the recommended mounting technique even though clamping can also be used. the backside of the package must be directly soldered to the heatsink. (see figure 4 for the flangeless package).
AN1233 - application notean1232 - app 3/4 solder (pbsn) heatsink pcb copper (35 m m) pcb smd package plated through holes. thermal compound screw m250 package lead pcb 1.6 mm thick heatsink solder pbsn figure 4: flangeless package mounting 3.2. flangeless package (e.g. m250 package). reflow soldering is the recommended mounting technique even though the clamping method can also be used. the backside of the package must be directly soldered to the heatsink (see figure 4). 3.3. smd package (e.g. so8 ceramic). reflow soldering is the recommended mounting technique. clamping can also be used. dissipated power (heat) is mainly transferred by conduction from the device to the heatsink through the printed circuit board. thermal resistance from the junction to the ambient must be reduced to a minimum value, hence all interfaces between the package and the ambient must be taken carefully into consideration (see figure 5). metallized ground plate and leads contribute to the heat flow. so it is recommended to mount the device on a large grounded metallized area on the printed circuit board. since the pcb is a poor thermal conductor (fr4, duroid, etc.), it is also recommended to use thermal vias (plated through holes) to improve the heat conduction. figure 5: smd package mounting
AN1233 - application note 4/4 4. lowering the thermal resistance between junction and ambient. in order to decrease the thermal resistance between the junction and the ambient one can consider undertaking the following actions: 1) increase the number of plated through holes. 2) increase the holes diameter. however, one must bare in mind that if the diameter is too large solder leaks out and forms solder balls beneath the pcb. this increases the thermal resistance between pcb and heatsink (0.5 mm < hole diameter < 1.0 mm). 3) decrease spacing between plated through holes. 4) decrease thickness of the printed circuit board. 5) use of a thin layer of thermal paste between pcb and heatsink. 6) screw the pcb to the heatsink as close as possible to the package. the screws will also help heat flows to the heatsink (see figure 5). information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 2000 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://ww w.st.com
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